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05/12/2023
Venice: Improving Solid-State Drive Parallelism at Low Cost via Conflict-Free Accesses
The performance and capacity of solid-state drives (SSDs) are continuous...
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12/13/2022
ALP: Alleviating CPU-Memory Data Movement Overheads in Memory-Centric Systems
Partitioning applications between NDP and host CPU cores causes inter-se...
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12/09/2022
TargetCall: Eliminating the Wasted Computation in Basecalling via Pre-Basecalling Filtering
Basecalling is an essential step in nanopore sequencing analysis where t...
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11/20/2022
TuRaN: True Random Number Generation Using Supply Voltage Underscaling in SRAMs
Prior works propose SRAM-based TRNGs that extract entropy from SRAM arra...
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11/08/2022
Accelerating Time Series Analysis via Processing using Non-Volatile Memories
Time Series Analysis (TSA) is a critical workload for consumer-facing de...
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10/16/2022
RevaMp3D: Architecting the Processor Core and Cache Hierarchy for Systems with Monolithically-Integrated Logic and Memory
Recent nano-technological advances enable the Monolithic 3D (M3D) integr...
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08/21/2022
Scrooge: A Fast and Memory-Frugal Genomic Sequence Aligner for CPUs, GPUs, and ASICs
Motivation: Pairwise sequence alignment is a very time-consuming step in...
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05/12/2022
SeGraM: A Universal Hardware Accelerator for Genomic Sequence-to-Graph and Sequence-to-Sequence Mapping
A critical step of genome sequence analysis is the mapping of sequenced ...
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02/21/2022
GenStore: A High-Performance and Energy-Efficient In-Storage Computing System for Genome Sequence Analysis
Read mapping is a fundamental, yet computationally-expensive step in man...
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06/10/2021
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations
DRAM is the dominant main memory technology used in modern computing sys...
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05/26/2021
SIMDRAM: An End-to-End Framework for Bit-Serial SIMD Computing in DRAM
Processing-using-DRAM has been proposed for a limited set of basic opera...
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12/22/2020
SIMDRAM: A Framework for Bit-Serial SIMD Processing Using DRAM
Processing-using-DRAM has been proposed for a limited set of basic opera...
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09/17/2020
FIGARO: Improving System Performance via Fine-Grained In-DRAM Data Relocation and Caching
DRAM Main memory is a performance bottleneck for many applications due t...
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10/23/2019
SMASH: Co-designing Software Compression and Hardware-Accelerated Indexing for Efficient Sparse Matrix Operations
Important workloads, such as machine learning and graph analytics applic...
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02/19/2019