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06/21/2023
Subgraph Stationary Hardware-Software Inference Co-Design
A growing number of applications depend on Machine Learning (ML) functio...
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05/23/2023
Chakra: Advancing Performance Benchmarking and Co-design using Standardized Execution Traces
Benchmarking and co-design are essential for driving optimizations and i...
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04/11/2023
TACOS: Topology-Aware Collective Algorithm Synthesizer for Distributed Training
Collective communications are an indispensable part of distributed train...
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04/07/2023
Perspectives on AI Architectures and Co-design for Earth System Predictability
Recently, the U.S. Department of Energy (DOE), Office of Science, Biolog...
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03/24/2023
ASTRA-sim2.0: Modeling Hierarchical Networks and Disaggregated Systems for Large-model Training at Scale
As deep learning models and input data are scaling at an unprecedented r...
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03/20/2023
Exploiting Inter-Operation Data Reuse in Scientific Applications using GOGETA
HPC applications are critical in various scientific domains ranging from...
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02/17/2023
VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs
Deep Learning (DL) acceleration support in CPUs has recently gained a lo...
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01/25/2023
Flexagon: A Multi-Dataflow Sparse-Sparse Matrix Multiplication Accelerator for Efficient DNN Processing
Sparsity is a growing trend in modern DNN models. Existing Sparse-Sparse...
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11/30/2022
COMET: A Comprehensive Cluster Design Methodology for Distributed Deep Learning Training
Modern Deep Learning (DL) models have grown to sizes requiring massive c...
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11/16/2022
XRBench: An Extended Reality (XR) Machine Learning Benchmark Suite for the Metaverse
Real-time multi-model multi-task (MMMT) workloads, a new form of deep le...
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10/07/2022
Demystifying Map Space Exploration for NPUs
Map Space Exploration is the problem of finding optimized mappings of a ...
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09/15/2022
Training Recipe for N:M Structured Sparsity with Decaying Pruning Mask
Sparsity has become one of the promising methods to compress and acceler...
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07/22/2022
Impact of RoCE Congestion Control Policies on Distributed Training of DNNs
RDMA over Converged Ethernet (RoCE) has gained significant attraction fo...
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06/07/2022
A Formalism of DNN Accelerator Flexibility
The high efficiency of domain-specific hardware accelerators for machine...
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01/26/2022
DiGamma: Domain-aware Genetic Algorithm for HW-Mapping Co-optimization for DNN Accelerators
The design of DNN accelerators includes two key parts: HW resource confi...
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01/26/2022
DNNFuser: Generative Pre-Trained Transformer as a Generalized Mapper for Layer Fusion in DNN Accelerators
Dataflow/mapping decides the compute and energy efficiency of DNN accele...
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01/21/2022
Enabling Flexibility for Sparse Tensor Acceleration via Heterogeneity
Recently, numerous sparse hardware accelerators for Deep Neural Networks...
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10/09/2021
Themis: A Network Bandwidth-Aware Collective Scheduling Policy for Distributed Training of DL Models
The continuous growth in both size and training data for modern Deep Neu...
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10/05/2021
RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU
As AI-based applications become pervasive, CPU vendors are starting to i...
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09/24/2021
Exploring Multi-dimensional Hierarchical Network Topologies for Efficient Distributed Training of Trillion Parameter DL Models
Deep Neural Networks have gained significant attraction due to their wid...
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09/15/2021
Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operations on Spatial Accelerators
To meet the extreme compute demands for deep learning across commercial ...
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08/16/2021
AIRCHITECT: Learning Custom Architecture Design and Mapping Space
Design space exploration is an important but costly step involved in the...
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07/13/2021
FLAT: An Optimized Dataflow for Mitigating Attention Performance Bottlenecks
Attention mechanisms form the backbone of state-of-the-art machine learn...
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06/19/2021
Evaluating Spatial Accelerator Architectures with Tiled Matrix-Matrix Multiplication
There is a growing interest in custom spatial accelerators for machine l...
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04/28/2021
Domain-specific Genetic Algorithm for Multi-tenant DNNAccelerator Scheduling
As Deep Learning continues to drive a variety of applications in datacen...
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03/18/2021
Extending Sparse Tensor Accelerators to Support Multiple Compression Formats
Sparsity, which occurs in both scientific applications and Deep Learning...
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03/14/2021
A Taxonomy for Classification and Comparison of Dataflows for GNN Accelerators
Recently, Graph Neural Networks (GNNs) have received a lot of interest b...
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01/12/2021
Self-Adaptive Reconfigurable Arrays (SARA): Using ML to Assist Scaling GEMM Acceleration
With increasing diversity in Deep Neural Network(DNN) models in terms of...
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12/23/2020
Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators
The everlasting demand for higher computing power for deep neural networ...
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11/30/2020
Dataflow-Architecture Co-Design for 2.5D DNN Accelerators using Wireless Network-on-Package
Deep neural network (DNN) models continue to grow in size and complexity...
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09/04/2020
ConfuciuX: Autonomous Hardware Resource Assignment for DNN Accelerators using Reinforcement Learning
DNN accelerators provide efficiency by leveraging reuse of activations/w...
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08/27/2020
CLAN: Continuous Learning using Asynchronous Neuroevolution on Commodity Edge Devices
Recent advancements in machine learning algorithms, especially the devel...
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08/19/2020
Restructuring, Pruning, and Adjustment of Deep Models for Parallel Distributed Inference
Using multiple nodes and parallel computing algorithms has become a prin...
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08/15/2020
Breaking Barriers: Maximizing Array Utilization for Compute In-Memory Fabrics
Compute in-memory (CIM) is a promising technique that minimizes data tra...
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07/07/2020
The gem5 Simulator: Version 20.0+
The open-source and community-supported gem5 simulator is one of the mos...
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06/30/2020
Efficient Communication Acceleration for Next-Gen Scale-up Deep Learning Training Platforms
Deep Learning (DL) training platforms are built by interconnecting multi...
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06/30/2020
Efficient Communication Acceleration for Next-GenScale-up Deep Learning Training Platforms
Deep Learning (DL) training platforms are built by interconnecting multi...
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06/10/2020
STONNE: A Detailed Architectural Simulator for Flexible Neural Network Accelerators
The design of specialized architectures for accelerating the inference p...
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06/06/2020
Conditional Neural Architecture Search
Designing resource-efficient Deep Neural Networks (DNNs) is critical to ...
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06/06/2020
Generative Design of Hardware-aware DNNs
To efficiently run DNNs on the edge/cloud, many new DNN inference accele...
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02/18/2020
Marvel: A Data-centric Compiler for DNN Operators on Spatial Accelerators
The efficiency of a spatial DNN accelerator depends heavily on the compi...
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02/18/2020
MARVEL: A Decoupled Model-driven Approach for Efficiently Mapping Convolutions on Spatial DNN Accelerators
The efficiency of a spatial DNN accelerator depends heavily on the compi...
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02/10/2020
Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Tasks
Neural Architecture Search (NAS) has demonstrated its power on various A...
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12/03/2019
Understanding the Impact of On-chip Communication on DNN Accelerator Performance
Deep Neural Networks have flourished at an unprecedented pace in recent ...
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09/13/2019
HERALD: Optimizing Heterogeneous DNN Accelerators for Edge Devices
Recent advances in deep neural networks (DNNs) have made DNNs the backbo...
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08/13/2019
Reinforcement Learning based Interconnection Routing for Adaptive Traffic Optimization
Applying Machine Learning (ML) techniques to design and optimize compute...
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10/16/2018
SCALE-Sim: Systolic CNN Accelerator Simulator
Systolic Arrays are one of the most popular compute substrates within De...
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10/16/2018
SCALE-Sim: Systolic CNN Accelerator
Systolic Arrays are one of the most popular compute substrates within De...
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08/03/2018
GeneSys: Enabling Continuous Learning through Neural Network Evolution in Hardware
Modern deep learning systems rely on (a) a hand-tuned neural network top...
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05/04/2018