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10/05/2021
RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU
As AI-based applications become pervasive, CPU vendors are starting to i...
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08/16/2021
AIRCHITECT: Learning Custom Architecture Design and Mapping Space
Design space exploration is an important but costly step involved in the...
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01/12/2021
Self-Adaptive Reconfigurable Arrays (SARA): Using ML to Assist Scaling GEMM Acceleration
With increasing diversity in Deep Neural Network(DNN) models in terms of...
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12/23/2020
Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators
The everlasting demand for higher computing power for deep neural networ...
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08/27/2020
CLAN: Continuous Learning using Asynchronous Neuroevolution on Commodity Edge Devices
Recent advancements in machine learning algorithms, especially the devel...
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10/16/2018
SCALE-Sim: Systolic CNN Accelerator Simulator
Systolic Arrays are one of the most popular compute substrates within De...
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10/16/2018
SCALE-Sim: Systolic CNN Accelerator
Systolic Arrays are one of the most popular compute substrates within De...
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08/03/2018